The present invention relates to a maximum/minimum data detecting system to detect the maximum or the minimum data in a given set of data.
In FIG. 8 is shown a block diagram of a conventional maximum/minimum data detecting system. The system has an array of RAM (Random Access Memory) 801, two bus lines 802,803, an ALU (Arithmetic and Logic Unit) 804, two registers 807,808, and an address pointer 809.
In FIG. 12 is shown a program for determining the maximum data in a data set. The program is designed to run on the conventional system of FIG. 8.
For illustration purposes assume that 50 data elements are stored in consecutive addresses within RAM 801. The first instruction, listed in the first line of the program in FIG. 12, points the address pointer 809 to the data element in address location "1" (AY=1). The second instruction transfers the data at address location "1" through the bus line 803, into register 808. This data is a tentative maximum X. The third instruction points the address pointer to the data in address location "2" in order to fetch the next data in RAM 801. The data at address location "2" is stored in register 807 through bus line 802. The following instruction, X-Y(AY) orders ALU 804 to carry out subtraction of the two data elements stored in registers 807,808. This calculation provides the result Z. The fifth instruction is a conditional-branch which is controlled by the result Z. If Z is negative, the sixth instruction is executed. This instruction transfers the data from register 807 to register 808, resulting in the replacement of the tentative maximum X by previously fetched data Y(AY).
On the other hand, if the result Z turns out to be zero or positive, the seventh instruction is executed. In the seventh instruction, the address pointer AY is incremented by one.
The eighth instruction determines if address pointer AY has reached location 50. If it has not, then some of the data in RAM 801 remains unchecked. Thus, the instructions from the fourth line through the eighth line will be executed again. In this manner, the instructions from the fourth line through the eighth line will be repeated 49 times before the program checks all of the 50 data elements. If the eighth instruction finds address pointer AY larger than 50, then all of the data in RAM has been checked. In this case, this instruction ends the program. The maximum data may then be found in register 808.
The minimum data can be detected merely by reversing the order of the subtrahend and the minuend in the fourth instruction. However, this type of maximum/minimum data detecting system as described above has certain disadvantages, some of which are as follows:
(1) To evaluate the comparison within a conditional branch and to switch the flow of the program according to the result, some time-consuming steps are necessary. This retards system operation. PA1 (2) Because of an inability to store address pointers as the program is executing, the system cannot provide any address information relating to detected maximum or minimum data.